Am 18.09.2017 um 15:44 schrieb Jerome Brunet:
> diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
> index c885c2d4b904..0254d8bfd536 100644
> --- a/drivers/mmc/host/meson-gx-mmc.c
> +++ b/drivers/mmc/host/meson-gx-mmc.c
> @@ -717,6 +717,22 @@ static int meson_mmc_clk_phase_tuning(struct mmc_host *mmc, u32 opcode,
> static int meson_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
> {
> struct meson_host *host = mmc_priv(mmc);
> + int ret;
> +
> + /*
> + * If this is the initial tuning, try to get a sane Rx starting
> + * phase before doing the actual tuning.
> + */
> + if (!mmc->doing_retune) {
> + ret = meson_mmc_clk_phase_tuning(mmc, opcode, host->rx_clk);
> +
> + if (ret)
> + return ret;
> + }
> +
> + ret = meson_mmc_clk_phase_tuning(mmc, opcode, host->tx_clk);
> + if (ret)
> + return ret;
>
> return meson_mmc_clk_phase_tuning(mmc, opcode, host->rx_clk);
> }
> -- 2.13.5
Unfortunately this still doesn't fix the issue here.
Tuning rx and tx clk sequentially assumes both are independent, what they
IMHO are not. So meybe we have to check all combinations of rx/tx clk phase.
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