RE: [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing

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Oh... Sorry for missing 'v2' in title.


> -----Original Message-----
> From: Yangbo Lu [mailto:yangbo.lu@xxxxxxx]
> Sent: Tuesday, August 15, 2017 10:17 AM
> To: linux-mmc@xxxxxxxxxxxxxxx; ulf.hansson@xxxxxxxxxx; Adrian Hunter
> Cc: Xiaobo Xie; Y.b. Lu
> Subject: [PATCH] mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1
> accessing
> 
> eSDHC is not a standard SD host controller. SDHCI_CAPABILITIES_1 register
> address is 0x44 while it's 0x114 (ESDHC_CAPABILITIES_1) for eSDHC.
> 
> Signed-off-by: Yangbo Lu <yangbo.lu@xxxxxxx>
> Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
> ---
> Changes for v2:
> 	- Removed duplicate perenthesis.
> 	- Added "Acked-by: Adrian Hunter".
> ---
>  drivers/mmc/host/sdhci-esdhc.h    |  3 +++
>  drivers/mmc/host/sdhci-of-esdhc.c | 23 +++++++++++++++++++++--
>  2 files changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-
> esdhc.h index e7893f2..dfa58f8 100644
> --- a/drivers/mmc/host/sdhci-esdhc.h
> +++ b/drivers/mmc/host/sdhci-esdhc.h
> @@ -54,6 +54,9 @@
>  #define ESDHC_CLOCK_HCKEN		0x00000002
>  #define ESDHC_CLOCK_IPGEN		0x00000001
> 
> +/* Host Controller Capabilities Register 2 */
> +#define ESDHC_CAPABILITIES_1		0x114
> +
>  /* Tuning Block Control Register */
>  #define ESDHC_TBCTL			0x120
>  #define ESDHC_TB_EN			0x00000004
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-
> of-esdhc.c
> index 44b016b..d96a057 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -86,6 +86,17 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
>  		return ret;
>  	}
> 
> +	/*
> +	 * DTS properties of mmc host are used to enable each speed mode
> +	 * according to soc and board capability. So clean up
> +	 * SDR50/SDR104/DDR50 support bits here.
> +	 */
> +	if (spec_reg == SDHCI_CAPABILITIES_1) {
> +		ret = value & ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
> +				SDHCI_SUPPORT_DDR50);
> +		return ret;
> +	}
> +
>  	ret = value;
>  	return ret;
>  }
> @@ -249,7 +260,11 @@ static u32 esdhc_be_readl(struct sdhci_host *host,
> int reg)
>  	u32 ret;
>  	u32 value;
> 
> -	value = ioread32be(host->ioaddr + reg);
> +	if (reg == SDHCI_CAPABILITIES_1)
> +		value = ioread32be(host->ioaddr + ESDHC_CAPABILITIES_1);
> +	else
> +		value = ioread32be(host->ioaddr + reg);
> +
>  	ret = esdhc_readl_fixup(host, reg, value);
> 
>  	return ret;
> @@ -260,7 +275,11 @@ static u32 esdhc_le_readl(struct sdhci_host *host,
> int reg)
>  	u32 ret;
>  	u32 value;
> 
> -	value = ioread32(host->ioaddr + reg);
> +	if (reg == SDHCI_CAPABILITIES_1)
> +		value = ioread32(host->ioaddr + ESDHC_CAPABILITIES_1);
> +	else
> +		value = ioread32(host->ioaddr + reg);
> +
>  	ret = esdhc_readl_fixup(host, reg, value);
> 
>  	return ret;
> --
> 2.1.0.27.g96db324

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