TI's implementation of sdhci controller used in DRA7 SoC's doesn't
have SDHCI_CAN_DO_ADMA2 set in CAPA register though it supports
ADMA2. Add quirk to support using ADMA2 even if the controller reports
incorrect capability in CAPA.
Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx>
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc/host/sdhci.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index ece3751d2a25..fff0baadbc3e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -3264,7 +3264,8 @@ int sdhci_setup_host(struct sdhci_host *host)
}
if ((host->version >= SDHCI_SPEC_200) &&
- (host->caps & SDHCI_CAN_DO_ADMA2))
+ ((host->caps & SDHCI_CAN_DO_ADMA2) ||
+ (host->quirks2 & SDHCI_QUIRK2_FORCE_ADMA)))
host->flags |= SDHCI_USE_ADMA;
if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6905131f603d..d778034e324d 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -437,6 +437,8 @@ struct sdhci_host {
#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15)
/* Controller does not have CRC stripped in Command Response */
#define SDHCI_QUIRK2_NO_CRC_STRIPPING (1<<16)
+/* Controller has bad caps bits, but really supports DMA */
+#define SDHCI_QUIRK2_FORCE_ADMA (1<<17)
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */
--
2.11.0
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