On Thu, Jul 20, 2017 at 11:44:46AM +0800, Chen-Yu Tsai wrote: > On the SoCs that introduced the new timing mode for MMC controllers, > both the old (where the clock delays are set in the CCU) and new > (where the clock delays are set in the MMC controller) timing modes > are available, and we have to support them both. However there are > two bits that control which mode is active. One is in the CCU, the > other is in the MMC controller. The settings on both sides must be > the same, or nothing will work. > > The sunxi-ng clock driver provides an API to query and set the > active timing mode. At probe time, we try to set the active mode > to the "new timing mode". If it succeeds, we can then use the MMC > controller in the new mode. If not, we fall back to the old mode. > > Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx> Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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