Hello Ulf, On Friday, January 20, 2017, Ulf Hansson wrote: > On 18 January 2017 at 18:25, Chris Brandt <chris.brandt@xxxxxxxxxxx> > wrote: > > Some controllers have 2 clock sources instead of 1, so they both need > > to be turned on/off. > > This doesn't tell me enough. Please elaborate. > > For example, tell how you treat the clocks, which of them that is optional > and why. Basically, the chip designers went in and broke out the logic that just does the card detect (more or less it's probably just some simple IRQ logic) so that you could shut off the IP block, but if you put in a card, the internal interrupt signal still went to the interrupt controller and registered the interrupt even though the rest of the IP block (including the register space) was dead. The idea seems to be that you could put the entire chip into low power mode and wake it up if you stuck a card in. My guess is that this was for some customer request or something. Personally...you could have done the same thing if you laid out a board and tied one of the extra IRQ lines to the cd signal...but I'm not sure if anyone thought about that at the time. So to your request, I could put all this ugly info into the documentation, but basically all I'm trying to do is join the 2 clocks back together to make it work like all the other SoCs since this new 'feature' might not really be practical to every use in this environment. > > static int sh_mobile_sdhi_card_busy(struct mmc_host *mmc) @@ -572,6 > > +581,10 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev) > > goto eprobe; > > } > > > > + priv->clk_cd = devm_clk_get(&pdev->dev, "cd"); > > + if (IS_ERR(priv->clk_cd)) > > + priv->clk_cd = NULL; > > Is this clock solely about card detection? So in cases when you have a > GPIO card detect, the clock isn't needed? > > Just trying to understand things a bit better... According to the hardware manual, enabling the "core" clock but not the "cd" clock is not a valid setting. So in our case, it's always all or nothing. Chris ��.n��������+%������w��{.n�����{��i��)��jg��������ݢj����G�������j:+v���w�m������w�������h�����٥