On Mon, Dec 5, 2016 at 6:08 PM, Caleb Crome <caleb@xxxxxxxxx> wrote:
> On Mon, Dec 5, 2016 at 5:24 PM, Caleb Crome <caleb@xxxxxxxxx> wrote:
>> On Mon, Dec 5, 2016 at 4:46 PM, Fabio Estevam <festevam@xxxxxxxxx> wrote:
>>> Hi Caleb,
>>>
>>> On Mon, Dec 5, 2016 at 10:36 PM, Caleb Crome <caleb@xxxxxxxxx> wrote:
>>>> Hello,
>>>> We have a board here where there is a signal integrity problem on the MMC
>>>> bus. It works fine at 25MHz, but does not work in higher speed modes.
>>>>
>>>> Is there an easy way to disable all the high speed modes? Perhaps from the
>>>> device tree?
>>>>
>>>> I tried searching the archives, but gmane seems to be not working.
>>>>
>>>> I'm using a stock 4.8.11 kernel.
>>>> Host processor is i.MX6
>>>
>>> Would max-frequency = <25000000>; do the trick?
>>>
>>> Please take a look at Documentation/devicetree/bindings/mmc/mmc.txt .
>>
>> Hi Fabio,
>> Thanks for the quick feedback -- I was momentarily hopeful...
>> Unfortunatley, that doesn't seem to work.
>>
>> I have set (using a solid-run hummingboard uSOM):
>> &usdhc2 {
>> pinctrl-names = "default";
>> pinctrl-0 = <
>> &pinctrl_hummingboard_usdhc2_aux
>> &pinctrl_hummingboard_usdhc2
>> >;
>> vmmc-supply = <®_3p3v>;
>> cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
>> max-frequency = <25000000>;
>> status = "okay";
>> };
>>
>> and just for good measure I set:
>> &usdhc1 {
>> max-frequency = <25000000>;
>> };
>> &usdhc3 {
>> max-frequency = <25000000>;
>> };
>> &usdhc4 {
>> max-frequency = <25000000>;
>> };
>> (though I'm pretty sure it's using SD2).
>>
>> And it not only attempts to clock at 50MHz, but also at 200 MHz -- way
>> beyond what the board can support.
>>
>> Basically, it doesn't seem to be heeding the max-frequency DT setting at all.
>>
>> I did in fact verify that the max-frequency value was read at
>> http://lxr.free-electrons.com/source/drivers/mmc/core/host.c#L216, and
>> the host->f_max frequency was set to 25000000, but that f_max was
>> ignored it seems.
>>
>
> Okay, I take it back -- sort of.
>
> The f_max is not ignored -- if I set 5MHz, the clock is *usually* 5MHz.
>
> However, I have a trigger set with my scope, and it actually does
> switch to 200MHz mode momentarily. I don't know whether or not this
> is the cause of my problems.
>
> Currently, my problem is that I get hard reboot just as the following
> happens: (This is a different problem from before I switch
> max-frequency).
>
> [ 5.293356] random: fast init done
> [ 5.298871] ALSA device list:
> [ 5.301973] #0: On-board SPDIF
> [ 5.318480] EXT4-fs (mmcblk0p2): mounting ext3 file system using
> the ext4 subsystem
> [ 5.350791] mmc1: new SDIO card at address 0001
> [ 5.379811] EXT4-fs (mmcblk0p2): mounted filesystem with ordered
> data mode. Opts: (null)
> [ 5.388118] VFS: Mounted root (ext3 filesystem) on device 179:2.
> [ 5.411692] devtmpfs: mounted
>
> U-Boot SPL 2013.10-rc4 (Dec 05 2016 - 14:09:51)
> Boot Device: SD1
> spl: error reading image u-boot.img, err - -1
> Load image from RAW...
>
>
> Here is an image of the scope capture showing the sd_clk transition
> from 5MHz to 200MHz in the middle of booting.
>
> https://drive.google.com/open?id=0BxzZmuc2tSowTzRHUms5RW9mUkE
>
> Thanks again,
>
> -Caleb
After some further investigation, I found a couple things:
Firstly, I had a weak power brick causing the spontanious reboot after
fixing max-frequency, so the max-frequency does seem to fix the
problem! Thanks Fabio!
Secondly, the SD clock on the SD interface definitely switches to 200
MHz mode at times. I'm not sure why. I checked with 3.14, 4.8, and
4.9, all have this behavior. However, there doesn't seem to be any
data flowing on the other pins during these intervals of 200MHz
clocking.
I checked the CMD pin, and all the data pins -- no transitions during
the 200MHz clock mode. So.. my board runs, but a 200MHz clock on
SD_CLK definitely doesn't seem right.
Thanks again,
- Caleb
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