On 11/14/2016 07:00 PM, Jun Nie wrote:
> 2016-11-14 15:58 GMT+08:00 Shawn Lin <shawn.lin@xxxxxxxxxxxxxx>:
>> On 2016/11/8 9:24, Jun Nie wrote:
>>>
>>> Document the device-tree binding of ZTE MMC host on
>>> ZX296718 SoC.
>>>
>>> Signed-off-by: Jun Nie <jun.nie@xxxxxxxxxx>
>>> ---
>>> .../devicetree/bindings/mmc/zx-dw-mshc.txt | 35
>>> ++++++++++++++++++++++
>>> 1 file changed, 35 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/mmc/zx-dw-mshc.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/mmc/zx-dw-mshc.txt
>>> b/Documentation/devicetree/bindings/mmc/zx-dw-mshc.txt
>>> new file mode 100644
>>> index 0000000..c175c4b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mmc/zx-dw-mshc.txt
>>> @@ -0,0 +1,35 @@
>>> +* ZTE specific extensions to the Synopsys Designware Mobile Storage
>>> + Host Controller
>>> +
>>> +The Synopsys designware mobile storage host controller is used to
>>> interface
>>> +a SoC with storage medium such as eMMC or SD/MMC cards. This file
>>> documents
>>> +differences between the core Synopsys dw mshc controller properties
>>> described
>>> +by synopsys-dw-mshc.txt and the properties used by the ZTE specific
>>> +extensions to the Synopsys Designware Mobile Storage Host Controller.
>>> +
>>> +Required Properties:
>>> +
>>> +* compatible: should be
>>> + - "zte,zx296718-dw-mshc": for ZX SoCs
>>> +
>>> +Example:
>>> +
>>> + mmc1: mmc@1110000 {
>>> + compatible = "zte,zx296718-dw-mshc";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + reg = <0x01110000 0x1000>;
>>> + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
>>> + fifo-depth = <32>;
>>> + data-addr = <0x200>;
>>> + fifo-watermark-aligned;
>>> + bus-width = <4>;
>>> + clock-frequency = <50000000>;
>>
>>
>> do you need both clock-frequency and max-frequency here?
>
> According to dts document, clock-frequency is for clock configuration
> when dw core probe. max-frequency is for mmc core to limit max
> frequency for any cards at any time. Do you have any suggestion? Thank
> you for your time!
As i know, Jun's comment is right. :)
clock-frequency should be used with clk_set_rate().
>
>>
>>> + clocks = <&topcrm SD0_AHB>, <&topcrm SD0_WCLK>;
>>> + clock-names = "biu", "ciu";
>>> + num-slots = <1>;
>>> + max-frequency = <50000000>;
>>> + cap-sdio-irq;
>>> + cap-sd-highspeed;
>>> + status = "disabled";
>>> + };
>>>
>>
>>
>> --
>> Best Regards
>> Shawn Lin
>>
>
>
>
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