Re: [PATCH v2] mmc: sunxi: Handle the 'New Timings'

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On Mon, Aug 01, 2016 at 06:26:03PM +0200, Jean-Francois Moine wrote:
> On Mon, 1 Aug 2016 16:30:19 +0100
> Mark Rutland <mark.rutland@xxxxxxx> wrote:
> 
> > On Mon, Aug 01, 2016 at 03:10:29PM +0200, Jean-Francois Moine wrote:
> > > Some MMC devices as mmc2 in the A83T or mmc1 and mmc2 in the H3 have
> > > a 'New Timings' mode.
> > > Set this capacity in the DT and use it when possible.
> > 
> > What exactly is this "New Timings" mode?
> > 
> > Why do we wnat to set it? Improved performance, power?
> > 
> > Is it *necessary* to use it?
> 
> This mode is described at least in the Allwinner's documentation of the
> A83T, A64 and H3.

Is this publicly available? If not, can the gist of it be described?

> From my tests, it is required to access the eMMC of the Banana Pi M3
> (mmc2).

Ok.

> > > Signed-off-by: Jean-Francois Moine <moinejf@xxxxxxx>
> > > ---
> > > I don't know if this mode works or is needed at 25MHz.
> > > ---
> > >  Documentation/devicetree/bindings/mmc/sunxi-mmc.txt |  1 +
> > >  drivers/mmc/host/sunxi-mmc.c                        | 21 +++++++++++++++++++--
> > >  2 files changed, 20 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt b/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
> > > index 4bf41d8..a541bf4 100644
> > > --- a/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
> > > +++ b/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
> > > @@ -19,6 +19,7 @@ Optional properties:
> > >   - reset-names : must contain "ahb"
> > >   - for cd, bus-width and additional generic mmc parameters
> > >     please refer to mmc.txt within this directory
> > > + - allwinner,new-timings: the controller may accept the "New Timings" mode
> > 
> > It's not at all clear to me what this means. This needs a better
> > description.
> > 
> > Which devices have this? Can we determine this based on compatible
> > string?
> 
> No, only some devices of the SoCs have this capability: the mmc2 of the
> A83T, the smhc0 and smhc1 of the A64, and the mmc1 and mmc2 of the H3.

Ok.

Thanks,
Mark.
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