Hi,
On 06/09/2015 04:31 PM, Suneel Garapati wrote:
> adds quirk for controllers whose clock divider zero is broken,
> sdhci_set_clock function will incorporate this modification.
>
> Signed-off-by: Suneel Garapati <suneel.garapati@xxxxxxxxxx>
> ---
> drivers/mmc/host/sdhci.c | 4 ++++
> drivers/mmc/host/sdhci.h | 2 ++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 1b4861d..087327e 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1210,6 +1210,10 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
> }
> real_div = div;
> div >>= 1;
> + if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
> + && !div && host->max_clk <= 25000000) {
> + div = 1;
> + }
I can't understand fully. how can it be broken for divider zero?
When formatting error is occurred, do you check really clock value?
I think your patch looks like just hard-coding for control clock.
Best Regards,
Jaehoon Chung
> }
> } else {
> /* Version 2.00 divisors must be a power of 2. */
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 5521d29..67046ca 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -409,6 +409,8 @@ struct sdhci_host {
> #define SDHCI_QUIRK2_SUPPORT_SINGLE (1<<13)
> /* Controller broken with using ACMD23 */
> #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14)
> +/* Broken Clock divider zero in controller */
> +#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15)
>
> int irq; /* Device IRQ */
> void __iomem *ioaddr; /* Mapped address */
> --
> 2.1.2
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