Hi Laurent > Hi Morimoto-san, > > Sorry for the late reply. Sorry for my late response too. > > > I'm not sure I would call this parent clock. It refers to the frequency of > > > the functional clock provided to the MMCIF, there's no concept of parent > > > there. True, the clock referenced by the MMCIF DT node is an MSTP gate > > > clock, and frequency control is implemented in the MSTP clock parent, but > > > that hardware architecture is internal to the CPG and shouldn't be > > > considered by the MMCIF. > > > > I couldn't understand about last 2 lines. > > Do you mean I need to add these method in CPG ? > > But, this calculates best clock of parent clock (= from CPG) and divider (= > > on MMC) Why CPG need to care about MMC's divider, > > and how to set it from CPG ?? > > No, that's not what I meant. The CPG should certainly not care about any MMCIF > internal divider. > > My point was about the name of the structure. However, now that you mention > the internal MMCIF clock divider, the word "parent" indeed makes sense. Please > ignore my comment. Thank you for your feedback, and thank you for your understanding. Best regards --- Kuninori Morimoto -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
