Re: [PATCH] sdhci-of-esdhc: Support 8BIT bus width.

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On 5 May 2015 at 14:22, Joakim Tjernlund <joakim.tjernlund@xxxxxxxxxxxx> wrote:
> On Tue, 2015-05-05 at 12:11 +0200, Ulf Hansson wrote:
>> On 5 May 2015 at 11:04, Joakim Tjernlund <joakim.tjernlund@xxxxxxxxxxxx> wrote:
>> > On Tue, 2015-05-05 at 10:34 +0200, Ulf Hansson wrote:
>> > > On 20 April 2015 at 23:11, Joakim Tjernlund
>> > > <joakim.tjernlund@xxxxxxxxxxxx> wrote:
>> > > > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@xxxxxxxxxxxx>
>> > >
>> > > Thanks, applied.
>> > >
>> > > Kind regards
>> > > Uffe
>> >
>> > Argh, I just learned that this patch is buggy. Please "unapply"
>> >
>> >  Jocke
>> >
>>
>> Done!
>
> Thanks, new version sent :)
>
> BTW, can I ask, cat /sys/kernel/debug/mmc0/ios:
> clock:          52000000 Hz
> actual clock:   50000000 Hz
> vdd:            7 (1.65 - 1.95 V)
> bus mode:       2 (push-pull)
> chip select:    0 (don't care)
> power mode:     2 (on)
> bus width:      3 (8 bits)
> timing spec:    1 (mmc high-speed)
> signal voltage: 0 (3.30 V)
>
> What is signal voltage: 0 (3.30 V) here ?

Since you are running in mmc high-speed mode, the 3.3V is the signal
voltage that is being used.


Kind regards
Uffe
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