Alim, On Tue, Feb 24, 2015 at 11:52 PM, Alim Akhtar <alim.akhtar@xxxxxxxxx> wrote: >>> This looks a HACK to me. >>> If stabilizing host voltage regulator is the problem, can you try out >>> below patch, and see if this resolve your issue? >> >> Actually, IMHO Alim's patch is more of a hack than Addy's. There's >> already a 10ms delay between "power up" and "power on" in the MMC core >> in mmc_power_up() state. That delay is commented as: >> > Well, my suggestion (adding 5ms in switch_volatge) was based on DW_MMC > databook (V2.41a) section "7.4.1.2 Voltage switch Normal Scenario" > step #7 which says:" After the 5ms timer expires, the host voltage > regulator is stable". So all of that should be handled by the core. Just reading the DW_MMC databook can be confusing because they don't differentiate between what's in the SDMMC spec and what's DW_MMC specific. Check out mmc_set_signal_voltage(), specifically: * During a signal voltage level switch, the clock must be gated * for 5 ms according to the SD spec -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
