[PATCH 1/1] mmc: sdhci-esdhc-imx: fix mmc ddr mode regression issue

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The regression is caused by the following commit ...

commit 79f7ae7c45a6ccf04e2908337461dee615f6afb0
Author: Seungwon Jeon <tgih.jun@xxxxxxxxxxx>
Date:   Fri Mar 14 21:11:56 2014 +0900

mmc: clarify DDR timing mode between SD-UHS and eMMC

This change distinguishes DDR timing mode of current
mixed usage to clarify device type.

Signed-off-by: Seungwon Jeon <tgih.jun@xxxxxxxxxxx>
Acked-by: Jaehoon Chung <jh80.chung@xxxxxxxxxxx>
Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
Signed-off-by: Chris Ball <chris@xxxxxxxxxx>

... and the line below.

@@ -1264,7 +1264,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
goto err;
	}
		mmc_card_set_ddr_mode(card);
-		mmc_set_timing(card->host, MMC_TIMING_UHS_DDR50);
+		mmc_set_timing(card->host, MMC_TIMING_MMC_DDR52);
		mmc_set_bus_width(card->host, bus_width);
	}
}

It's caused by the platform driver was still using MMC_TIMING_UHS_DDR50 for MMC DDR
mode which needs update too.

Reported-by: Fabio Estevam <fabio.estevam@xxxxxxxxxxxxx>
Reported-by: Shawn Guo <shawn.guo@xxxxxxxxxxxxx>
Signed-off-by: Dong Aisheng <b29396@xxxxxxxxxxxxx>
---
 drivers/mmc/host/sdhci-esdhc-imx.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index b841bb7..16e4219 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -858,6 +858,7 @@ static int esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
 		imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR104;
 		break;
 	case MMC_TIMING_UHS_DDR50:
+	case MMC_TIMING_MMC_DDR52:
 		imx_data->uhs_mode = SDHCI_CTRL_UHS_DDR50;
 		writel(readl(host->ioaddr + ESDHC_MIX_CTRL) |
 				ESDHC_MIX_CTRL_DDREN,
-- 
1.7.8

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