Hi!
On Mon, Feb 17, 2014 at 01:55:11PM -0600, dinguyen@xxxxxxxxxx wrote:
> From: Dinh Nguyen <dinguyen@xxxxxxxxxx>
>
> Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform specific
> implementation of the dwc_mmc driver.
>
> Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
> driver can use the syscon driver to toggle the register for the SD/MMC
> clock phase shift settings.
>
> Finally, fix an indentation error for the sysmgr node.
>
> Signed-off-by: Dinh Nguyen <dinguyen@xxxxxxxxxx>
> Acked-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> Tested-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Pawel Moll <pawel.moll@xxxxxxx>
> Cc: Mark Rutland <mark.rutland@xxxxxxx>
> Cc: Ian Campbell <ijc+devicetree@xxxxxxxxxxxxxx>
> Cc: Kumar Gala <galak@xxxxxxxxxxxxxx>
> Cc: Seungwon Jeon <tgih.jun@xxxxxxxxxxx>
> Cc: Jaehoon Chung <jh80.chung@xxxxxxxxxxx>
> Cc: Chris Ball <chris@xxxxxxxxxx>
> ---
> v2: Fix indentation for the sysmgr node
> ---
> .../devicetree/bindings/mmc/socfpga-dw-mshc.txt | 23 ++++++++++++++++++++
> arch/arm/boot/dts/socfpga.dtsi | 15 +++++++++++--
> arch/arm/boot/dts/socfpga_arria5.dtsi | 11 ++++++++++
> arch/arm/boot/dts/socfpga_cyclone5.dtsi | 11 ++++++++++
> arch/arm/boot/dts/socfpga_vt.dts | 11 ++++++++++
> 5 files changed, 69 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
>
> @@ -528,8 +539,8 @@
> };
>
> sysmgr@ffd08000 {
> - compatible = "altr,sys-mgr";
> - reg = <0xffd08000 0x4000>;
> + compatible = "altr,sys-mgr", "syscon";
> + reg = <0xffd08000 0x4000>;
> };
> };
> };
Thanks for fixing this, but please don't forget the curly and
the semicolon.
Regards,
Steffen
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