Re: [PATCH 3/7] mmc: omap: clarify DDR timing mode between SD-UHS and eMMC

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On Wednesday 15 January 2014 07:41 PM, Seungwon Jeon wrote:
Replaced UHS_DDR50 with MMC_DDR52.

CC: Balaji T K <balajitk@xxxxxx>
Signed-off-by: Seungwon Jeon <tgih.jun@xxxxxxxxxxx>

Looks good to me

Acked-by: Balaji T K <balajitk@xxxxxx>

---
  drivers/mmc/host/omap_hsmmc.c |    4 ++--
  1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index dbd32ad..cca397e 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -540,7 +540,7 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
  	 *	- MMC/SD clock coming out of controller > 25MHz
  	 */
  	if ((mmc_slot(host).features & HSMMC_HAS_HSPE_SUPPORT) &&
-	    (ios->timing != MMC_TIMING_UHS_DDR50) &&
+	    (ios->timing != MMC_TIMING_MMC_DDR52) &&
  	    ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) {
  		regval = OMAP_HSMMC_READ(host->base, HCTL);
  		if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000)
@@ -560,7 +560,7 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)
  	u32 con;

  	con = OMAP_HSMMC_READ(host->base, CON);
-	if (ios->timing == MMC_TIMING_UHS_DDR50)
+	if (ios->timing == MMC_TIMING_MMC_DDR52)
  		con |= DDR;	/* configure in DDR mode */
  	else
  		con &= ~DDR;


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