Re: [PATCH 2/7] mmc: mmci: clarify DDR timing mode between SD-UHS and eMMC

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On 15 January 2014 15:11, Seungwon Jeon <tgih.jun@xxxxxxxxxxx> wrote:
> Replaced UHS_DDR50 with MMC_DDR52.
>
> CC: Russell King <linux@xxxxxxxxxxxxxxxx>
> Signed-off-by: Seungwon Jeon <tgih.jun@xxxxxxxxxxx>
> ---
>  drivers/mmc/host/mmci.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
> index f320579..c348427 100644
> --- a/drivers/mmc/host/mmci.c
> +++ b/drivers/mmc/host/mmci.c
> @@ -299,7 +299,7 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
>         if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8)
>                 clk |= MCI_ST_8BIT_BUS;
>
> -       if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50)
> +       if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52)

This will break DDR mode for UHS SD-cards.

>                 clk |= MCI_ST_UX500_NEG_EDGE;
>
>         mmci_write_clkreg(host, clk);
> @@ -784,7 +784,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
>                         mmci_write_clkreg(host, clk);
>                 }
>
> -       if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50)
> +       if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52)
>                 datactrl |= MCI_ST_DPSM_DDRMODE;

This will break DDR mode for UHS SD-cards.

Kind regards
Ulf Hansson


>
>         /*
> --
> 1.7.0.4
>
>
> --
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