Re: [RFC/PATCH 0/2] mmc: sdhci: Workaround Intel Merrifield issue for HS200

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On Fri, Dec 20, 2013 at 11:25 AM, David Cohen
<david.a.cohen@xxxxxxxxxxxxxxx> wrote:
> On Fri, Dec 20, 2013 at 11:00:23AM +0800, Dong Aisheng wrote:
>> On Wed, Nov 13, 2013 at 5:49 AM, David Cohen
>> <david.a.cohen@xxxxxxxxxxxxxxx> wrote:
>> > On 10/29/2013 10:58 AM, David Cohen wrote:
>> >>
>> >> Hi,
>> >>
>> >> SDHCI used to work well on Intel Merrifield until this patch was applied:
>> >>
>> >> commit 156e14b126ffb6f040bc6f1aff3c51077e42a744
>> >> Author: Giuseppe CAVALLARO <peppe.cavallaro@xxxxxx>
>> >> Date:   Wed Jun 12 08:16:38 2013 +0200
>> >>
>> >>      mmc: sdhci: fix caps2 for HS200
>> >>
>> >>      Although the HC supports HS200 (eMMC) the caps2 are always zero; this
>> >>      means there's no way to use the super speed mode (when init the
>> >> card).
>> >>
>> >>      If the HC support SDR104, for SD3.0, so it also supports HS200 for
>> >> eMMC
>> >>      and this patch just sets the MMC_CAP2_HS200 in the host caps2 field.
>> >>
>> >> Looks like there is a hw issue with unknown root cause so far.
>> >>
>> >> Is it acceptable to have the quirk I'm proposing to workaround the issue?
>> >
>> >
>> > Ping. Any comments here?
>> >
>>
>> Chris,
>> Can you pick this one?
>> IMX also needs this quirk for imx6q/dl since it can not meet HS200
>> timing requirement.
>>
>>
>> David,
>> Is the unkonwn hw issue in your patch #2 resolved now?
>> If yes, you may not need this quirk.
>> I could resend it with your sign-off with IMX patches.
>
> Merrifield still needs this quirk to not break MMC support.
> This quirk could be applied to 3.13-rc (since merrifield was added to
> sdhci-pci.c on 3.13-rc1).
>

Okay, thanks for the information.
So please take my ACK:
Acked-by: Dong Aisheng <b29396@xxxxxxxxxxxxx>

I will send IMX patches based on it.

Regards
Dong Aisheng

> Br, David
>
>>
>> Regards
>> Dong Aisheng
>>
>> > Br, David Cohen
>> > --
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