Hi Shawn, Sascha, On Fri, Sep 13 2013, Dong Aisheng wrote: > This patch series add SD3.0 support for i.MX6Q/DL. > Since freescale i.MX6Q/DL uSDHC clock tuning progress is a little different from > the standard tuning process defined in host controller spec v3.0. > So we add a hook to allow execute platform specific tuning instead of > standard host controller tuning. > > The main difference are: > 1) not only generate Buffer Read Ready interrupt when tuning is performing. > It generates all other DATA interrupts like the normal data command. > 2) SDHCI_CTRL_EXEC_TUNING is not automatically cleared by HW, > instead it's controlled by SW. > 3) SDHCI_CTRL_TUNED_CLK is not automatically set by HW, > it's controlled by SW. > 4) the clock delay for every tuning is set by SW. > > Tested on i.MX6Q Sabreauto board. Please could someone ACK this series? Thanks, - Chris. -- Chris Ball <cjb@xxxxxxxxxx> <http://printf.net/> -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
