[PATCH 5/5] mmc:esdhc: eSDHC host don't have highspeed bit

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eSDHC host is not a standand host, there is no
SDHCI_CTRL_HISPD bit in SDHCI_HOST_CONTROL register.
Add this quirk to avoid changing the Data transfer width
bit of eSDHC host.

Signed-off-by: Haijun Zhang <Haijun.Zhang@xxxxxxxxxxxxx>
---
 drivers/mmc/host/sdhci-esdhc.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index a2a0642..6de001e 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -23,6 +23,7 @@
 				SDHCI_QUIRK_NONSTANDARD_CLOCK | \
 				SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
 				SDHCI_QUIRK_PIO_NEEDS_DELAY | \
+				SDHCI_QUIRK_NO_HISPD_BIT | \
 				SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
 
 #define ESDHC_SYSTEM_CONTROL	0x2c
-- 
1.8.0


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