Hi Jaehoon,
On Mon, May 27 2013, Jaehoon Chung wrote:
> When use the QUIRK_NONSTANDARD_CLOCK, then never set to 0 at clock control register.
> This patch is fixed this problem.
>
> Signed-off-by: Jaehoon Chung <jh80.chung@xxxxxxxxxx
> Signed-off-by: Kyungmin Park <kyungmin.park@xxxxxxxxxxx>
> ---
> Changelog v2:
> - Rebased at the latest mmc tree
>
> drivers/mmc/host/sdhci-s3c.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
> index 926aaf6..ce71f32 100644
> --- a/drivers/mmc/host/sdhci-s3c.c
> +++ b/drivers/mmc/host/sdhci-s3c.c
> @@ -297,8 +297,11 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
> u16 clk = 0;
>
> /* don't bother if the clock is going off */
> - if (clock == 0)
> + if (clock == 0) {
> + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
> + host->clock = clock;
> return;
> + }
>
> sdhci_s3c_set_clock(host, clock);
You should change the comment too, since your patch invalidates it.
Thanks,
- Chris.
--
Chris Ball <cjb@xxxxxxxxxx> <http://printf.net/>
One Laptop Per Child
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