On Monday, June 17, 2013, Jaehoon Chung wrote:
> This capability didn't need to set in dw_mmc_caps[].
> In dw-mmc.c, this capability could be set with bus_width value.
You're right. It can be set from dw_mci_of_get_bus_wd.
But I have another idea. exynos_dwmmc_caps is host own capability.
As we know, host#0 support 8-bit widths.
This capability is meaningful by default at this view.
On the other hand, we don't need to refer to bus_width value.
If we exclude bus-width capability from exynos_dwmmc_caps,
it should assume that bus-width is decided from outside.
Then, I think the related comment should be included.
Thanks,
Seungwon Jeon
>
> Signed-off-by: Jaehoon Chung <jh80.chung@xxxxxxxxxxx>
> ---
> drivers/mmc/host/dw_mmc-exynos.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
> index f013e7e..31d518b 100644
> --- a/drivers/mmc/host/dw_mmc-exynos.c
> +++ b/drivers/mmc/host/dw_mmc-exynos.c
> @@ -154,8 +154,7 @@ static int dw_mci_exynos_parse_dt(struct dw_mci *host)
>
> /* Common capabilities of Exynos4/Exynos5 SoC */
> static unsigned long exynos_dwmmc_caps[4] = {
> - MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR |
> - MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23,
> + MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR | MMC_CAP_CMD23,
> MMC_CAP_CMD23,
> MMC_CAP_CMD23,
> MMC_CAP_CMD23,
> --
> 1.7.9.5
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