On Thu, Jan 24, 2013 at 01:48:39PM +0100, Ulf Hansson wrote: > Correct. ST-variants requires to use the POWER register to gate the > clock. So if this is not the case for VE you don't need to bother, > otherwise you should set "pwrreg_clkgate" for this variant as well. The ARM variant does gate the clock as well. It's all described in the TRM. When power is turned off, the clock and power is removed from the card. When power is applied, there is a defined sequence that must be gone through (which is partly handled by the device and partly by the software) through the OFF->POWER UP->POWER ON sequence. The clock can be masked independently too via the clock enable bit in the clock register. However, it's interesting to note: experiments that Linus did with having the primecell automatically masking the clock to the card did not prove worthwhile (see the comment in the code). We seem to be heading towards doing this in software and people suggesting it is worthwhile... Why is this? If the hardware can gate the clock and it doesn't produce the power savings we expect, how does then gating the clock via software then become worthwhile? It doesn't make sense. -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
