SDHCI core will try to use Auto CMD23 for mmc card. Currently, we will
see the following message with mmc card on usdhc due to the lacking of
Auto CMD23 support in the driver.
$ mmc0: new high speed MMC card at address 0001
mmcblk1: mmc0:0001 MMC02G 1.87 GiB
mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
mmcblk1: retrying using single block read
mmcblk1:
Enable Auto CMD23 support for usdhc so that mmc card can work in
multiple block mode.
Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
---
drivers/mmc/host/sdhci-esdhc-imx.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 968a70f..24daaf4 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -36,6 +36,9 @@
#define ESDHC_VENDOR_SPEC_SDIO_QUIRK (1 << 1)
#define ESDHC_WTMK_LVL 0x44
#define ESDHC_MIX_CTRL 0x48
+#define ESDHC_MIX_CTRL_AC23EN (1 << 7)
+/* Bits 3 and 6 are not SDHCI standard definitions */
+#define ESDHC_MIX_CTRL_SDHCI_MASK 0xb7
/*
* There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
@@ -251,7 +254,12 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
if (is_imx6q_usdhc(imx_data)) {
u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
- m = val | (m & 0xffff0000);
+ /* Swap AC23 bit */
+ if (val & SDHCI_TRNS_AUTO_CMD23) {
+ val &= ~SDHCI_TRNS_AUTO_CMD23;
+ val |= ESDHC_MIX_CTRL_AC23EN;
+ }
+ m = val | (m & ~ESDHC_MIX_CTRL_SDHCI_MASK);
writel(m, host->ioaddr + ESDHC_MIX_CTRL);
} else {
/*
--
1.7.9.5
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