This is minor change.
Acked-by: Seungwon Jeon <tgih.jun@xxxxxxxxxxx>
Thanks,
Seungwon Jeon
On Thursday, November 08, 2012, Jaehoon Chung <jh80.chung@xxxxxxxxxxx> wrote:
> ctype is used 1-bit buswidth mode by default.
>
> Signed-off-by: Jaehoon Chung <jh80.chung@xxxxxxxxxxx>
> Signed-off-by: Kyungmin Park <kyungmin.park@xxxxxxxxxxx>
> ---
> drivers/mmc/host/dw_mmc.c | 9 +++------
> 1 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index a1369aa..0a80b5c 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -773,19 +773,16 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> struct dw_mci_drv_data *drv_data = slot->host->drv_data;
> u32 regs;
>
> - /* set default 1 bit mode */
> - slot->ctype = SDMMC_CTYPE_1BIT;
> -
> switch (ios->bus_width) {
> - case MMC_BUS_WIDTH_1:
> - slot->ctype = SDMMC_CTYPE_1BIT;
> - break;
> case MMC_BUS_WIDTH_4:
> slot->ctype = SDMMC_CTYPE_4BIT;
> break;
> case MMC_BUS_WIDTH_8:
> slot->ctype = SDMMC_CTYPE_8BIT;
> break;
> + default:
> + /* set default 1 bit mode */
> + slot->ctype = SDMMC_CTYPE_1BIT;
> }
>
> regs = mci_readl(slot->host, UHS_REG);
> --
> 1.7.4.1
> --
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