Hi , using mmc_test.c code ( test case 37 : Write performance with blocking req 4MB ) , i am trying to analyse different state transitions for a mmc write transfer size 1MB (blksize 512 and blocks 2048 ). Intially the card state = 4 : Transfer state . upon receipt of CMD25 (WRITE_MULTIPLE_BLOCK) , card state = 6 : Receive Data . but upon receipt of CMD12 , card state comes again as 4 : Transfer state . But in JEDEC spec , upon receipt of CMD12 , card state should first be PRG state and after operation complete , it should go to Transfer State . can i be guided for : 1) will the MMC card switch to PRG state at the end of every CMD25-CMD12 operation ? or it will cache multiple write data transfers and switch to PRG state at some later time ? 2) any mechanism to catch up PRG state with a mmc multiple block write transfer . Thanx & Regards Amit -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
