On Tue, Sep 4, 2012 at 6:39 PM, Hebbar, Gururaja <gururaja.hebbar@xxxxxx> wrote: > HSMMC IP on AM33xx need a special setting to handle High-speed cards. > Other platforms like TI81xx, OMAP4 may need this as-well. This depends > on the HSMMC IP timing closure done for the high speed cards. > > From AM335x TRM (SPRUH73F - 18.3.12 Output Signals Generation) > > The MMC/SD/SDIO output signals can be driven on either falling edge or > rising edge depending on the SD_HCTL[2] HSPE bit. This feature allows > to reach better timing performance, and thus to increase data transfer > frequency. > > There are few pre-requisites for enabling the HSPE bit > - Controller should support High-Speed-Enable Bit and > - Controller should not be using DDR Mode and > - Controller should advertise that it supports High Speed in > capabilities register and > - MMC/SD clock coming out of controller > 25MHz > The patch is well written. But then, I don't see a need for a DT binding for this feature. By definition, HS implies 25MHz or above, so that check seems to be redundant as well. Meanwhile, I'll check with HSPE enabled on OMAP. Regards, Venkat. -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html