Re: [PATCH] omap-hsmmc: Implementation of i761 errata

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On Fri, Aug 17, 2012 at 11:43 PM, Puttagunta, Viswanath <vishp@xxxxxx> wrote:
> On Fri, Aug 17, 2012 at 12:28 PM, S, Venkatraman <svenkatr@xxxxxx> wrote:
>> On Fri, Aug 17, 2012 at 9:35 PM, Semen Protsenko <semen.protsenko@xxxxxx> wrote:
>>> Errata description:
>>> Due to a bad behavior of an internal signal, the Card Error interrupt bit
>>> MMCHS_STAT[28] CERR may not be set sometimes when an error occurred in the
>>> card response.
>>>
>>> Workaround:
>>> After responses of type R1/R1b for all cards and responses of type R5/R5b/R6
>>> for SD and SDIO cards, software must read two registers: MMCHS_RSP10 and
>>> MMCHS_CSRE. When a MMCHS_CSRE[i] bit is set to 1, if the corresponding bit at
>>> the same position in the response MMCHS_RSP10[i] is set to 1, the host
>>> controller indicates a card error and software should proceed in the same way
>>> as if a CERR interrupt would have been detected in the MMCHS_STAT register.
>>>
>>> Note:
>>> This errata is applicable for omap44xx.
>>>
>>> Signed-off-by: Semen Protsenko <semen.protsenko@xxxxxx>
>>
>> The implementation looks fine, but can we simply not set the errata
>> flag and make this as default
>> behaviour ? I suppose the documented behaviour with CSRE and RSP10 is
>> independent of the
>> errata..
>>
>> Also, please send it to the linux-mmc list as well.
>
> Vish>> We don't know if this errata effects OMAP5 as well. So, I think
> we should only do this if we are OMAP4.
>
That's precisely why the code shouldn't check for cpu_() flags. There are other
OMAP variants as well and we can't check all of them
What I mean is to make the check for RSP10 and CSRE all the time as part
of the IRQ check.
  Then it equally applies to silcon with or without errata.
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