Hello Ido, On Tue, Jan 24, 2012 at 16:46:05, Ido Yariv wrote: > The davinci mmc interrupt handler fills the fifo, as long as the DXRDY > or DRRDY bits are set in the status register. > > If interrupts fire during this loop, they will be handled by the > handler, but the interrupt controller will still buffer these. As a > result, the handler will be called again to serve these needlessly. In > order to avoid these spurious interrupts, keep interrupts masked while > filling the fifo. > I tested both these patches and they work fine on the OMAP-L138 EVM. I observed that with these patches the number of interrupts during a transfer are less compared to earlier. For a 100 MB transfer, I could see around 700-800 interrupts less. Did you see any performance improvement with these patches? Thanks, Sudhakar -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
