> -----Original Message----- > From: Anton Vorontsov [mailto:cbouatmailru@xxxxxxxxx] > Sent: Friday, September 09, 2011 22:07 PM > To: Zang Roy-R61911 > Cc: linux-mmc@xxxxxxxxxxxxxxx; linuxppc-dev@xxxxxxxxxxxxxxxx; akpm@linux- > foundation.org; Xu Lei-B33228; Kumar Gala > Subject: Re: [PATCH] eSDHC: Access Freescale eSDHC registers by 32-bit > > On Fri, Sep 09, 2011 at 08:05:46PM +0800, Roy Zang wrote: > > From: Xu lei <B33228@xxxxxxxxxxxxx> > > > > Freescale eSDHC registers only support 32-bit accesses, > > this patch ensures that all Freescale eSDHC register accesses > > are 32-bit. > > > > Signed-off-by: Xu lei <B33228@xxxxxxxxxxxxx> > > Signed-off-by: Roy Zang <tie-fei.zang@xxxxxxxxxxxxx> > > Signed-off-by: Kumar Gala <galak@xxxxxxxxxxxxxxxxxxx> > > --- > > The patch looks OK. > > Acked-by: Anton Vorontsov <cbouatmailru@xxxxxxxxx> Thanks. Add Chris. > > [...] > > +static u8 esdhc_readb(struct sdhci_host *host, int reg) > > +{ > > + int base = reg & ~0x3; > > + int shift = (reg & 0x3) * 8; > > + u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff; > > return ret; > > } > > Though, I wonder if we could change sdhci_be32bs_read{b,w}, instead > of making this local to eSDHC. > > The thing is: sdhci_be32bs_writeb() is using clrsetbits_be32, > so the write variant already uses 32-bit accessors, so nothing should > break if we switch sdhci_be32bs_readb() to in_be32(). > > But maybe it's safer if we do this in a separate patch, so that it > could be easily reverted without impacting eSDHC if something actually > breaks. > > You decide. :-) > > Thanks! The suggestion makes sense. I'd like to do this in a separate patch after this patch applied. Thanks. Roy ��.n��������+%������w��{.n�����{��i��)�� jg��� �����ݢj����G���� ���j:+v���w�m������w�������h�����٥
