Re: [PATCH] mxs-mmc: fix clock rate setting

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I send the patch as attachment for now.

But I'll have to look into another way of doing this. Corporate mail
system is adding stupid disclaimers, gmail web ui is not working ok
and corporate firewalls avoid using a different smtp server...



On Fri, Jul 1, 2011 at 2:27 PM, Wolfram Sang <w.sang@xxxxxxxxxxxxxx> wrote:
>
>> Think the tabs problem was due to the gmail web ui.
>> Hope it's better now.
>
> No 0xa0 anymore, but still no tabs. Oh, and lines are wrapped.
>
> Documentation/email-clients.txt says
>
> ===
>
> Gmail (Web GUI)
>
> Does not work for sending patches.
>
> Gmail web client converts tabs to spaces automatically.
>
> At the same time it wraps lines every 78 chars with CRLF style line
> breaks although tab2space problem can be solved with external editor.
>
> Another problem is that Gmail will base64-encode any message that has a
> non-ASCII character. That includes things like European names.
>
> ===
>
> I don't know if git-send-email can work directly with gmail, but it
> seems you need some kind of alternative approach.
>
> Regards,
>
>   Wolfram
>
> --
> Pengutronix e.K.                           | Wolfram Sang                |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
>
> -----BEGIN PGP SIGNATURE-----
> Version: GnuPG v1.4.10 (GNU/Linux)
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> iEYEARECAAYFAk4NvR0ACgkQD27XaX1/VRtjmACfQzU2j5+awQ78Ey7Ir+39uhxn
> j70AoJQG0D6tK3rYh4YeYsiyFAsLieC5
> =DqDV
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>
From ab610437fade5b30fdeacd9e959ddf95bc42587a Mon Sep 17 00:00:00 2001
From: Koen Beel <koen.beel@xxxxxxxxx>
Date: Thu, 30 Jun 2011 12:00:19 +0200
Subject: [PATCH] mxs-mmc: fix clock rate setting

Fix clock rate setting on mxs-mmc driver.
Previously, if div2 was zero the value for TIMING_CLOCK_RATE would have been 255 instead of 0.
Also the limits for div1 (TIMING_CLOCK_DIVIDE) and div2 (TIMING_CLOCK_RATE + 1) where not correctly defined.

Can easily be reproduced on mx23evk: default clock for high speed sdio cards is 50 MHz.
With a SSP_CLK of 28.8 MHz (default), this resulted in an actual clock rate of about 56 kHz.

Signed-off-by: Koen beel <koen.beel@xxxxxxxxx>
---
 drivers/mmc/host/mxs-mmc.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index 99d39a6..3575330 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -570,22 +570,22 @@ static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)
 
 	ssp_rate = clk_get_rate(host->clk);
 
-	for (div1 = 2; div1 < 254; div1 += 2) {
+	for (div1 = 2; div1 <= 254; div1 += 2) {
 		div2 = ssp_rate / rate / div1;
-		if (div2 < 0x100)
+		if (div2 <= 256)
 			break;
 	}
 
-	if (div1 >= 254) {
+	if (div1 > 254) {
 		dev_err(mmc_dev(host->mmc),
 			"%s: cannot set clock to %d\n", __func__, rate);
 		return;
 	}
 
 	if (div2 == 0)
-		bit_rate = ssp_rate / div1;
-	else
-		bit_rate = ssp_rate / div1 / div2;
+		div2 = 1;
+
+	bit_rate = ssp_rate / div1 / div2;
 
 	val = readl(host->base + HW_SSP_TIMING);
 	val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);
-- 
1.7.4.1


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