Hi, On Thu, May 05 2011, Arindam Nath wrote: > Host Controller v3.00 supports programmable clock mode as an optional > feature. The support for this mode is indicated by non-zero value in > bits 48-55 of the Capabilities register. If supported, the actual > value of Clock Multiplier is one more than the value provided in the > bit fields. We only set Clock Generator Select (bit 5) and SDCLK > Frequency Select (bits 8-15) of the Clock Control register in case > Preset Value Enable is not set, otherwise these fields are automatically > set by the Host Controller based on the UHS mode selected. Also, since > the maximum and minimum clock frequency in this mode can be > (Base Clock * Clock Mul) and (Base Clock * Clock Mul)/1024 respectively, > f_max and f_min have been recalculated to reflect this change. > > Signed-off-by: Arindam Nath <arindam.nath@xxxxxxx> > Reviewed-by: Philip Rakity <prakity@xxxxxxxxxxx> > Tested-by: Philip Rakity <prakity@xxxxxxxxxxx> Thanks, pushed to mmc-next for .40. - Chris. -- Chris Ball <cjb@xxxxxxxxxx> <http://printf.net/> One Laptop Per Child -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
