2010/12/2 Russell King - ARM Linux <linux@xxxxxxxxxxxxxxxx>:
> On Thu, Dec 02, 2010 at 05:51:18PM +0100, Linus Walleij wrote:
>> From: Ulf Hansson <ulf.hansson@xxxxxxxxxxxxxx>
>>
>> The Ux500 variant of this block has a different divider.
>> The value used right now is too big and which means a loss
>> in performance. This fix corrects it.
>
> Err.
>
>> + } else if (variant->st_clkdiv) {
>> + clk = ((host->mclk + desired - 1) / desired) - 2;
>> + if (clk >= 256)
>> + clk = 255;
>> + host->cclk = host->mclk / (clk + 2);
>
> This causes the divider to be selected for the 'nearest' frequency.
> You are not allowed to _exceed_ the desired frequency - you must
> always round down.
I don't get it because what we try to do is round the divider
up so the divided result will be rounded down... Is it the -2
part that confuse things? That is just a constant from the
datasheet. (Some default divider offset.)
I rewrote the patch using DIV_ROUND_UP() and expanded
the maths from the datasheets so I properly understand it
myself, is this better:
>From 7d72dfb6016d154c82acbd0d7b8d15e196ff4ec5 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@xxxxxxxxxxxxxx>
Date: Tue, 12 Oct 2010 18:00:28 +0200
Subject: [PATCH] mmci: corrected calculation of clock div for ux500
The Ux500 variant of this block has a different divider.
The value used right now is too big and which means a loss
in performance. This fix corrects it. Also expand the math
comments a bit so it's clear what's happening.
Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxxxxxx>
Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxxxxxx>
---
drivers/mmc/host/mmci.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 7567872..0a95377 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -51,6 +51,7 @@ static unsigned int fmax = 515633;
* @broken_blockend_dma: the MCI_DATABLOCKEND is broken on the hardware when
* using DMA.
* @sdio: variant supports SDIO
+ * @st_clkdiv: true if using a ST-specific clock divider algorithm
*/
struct variant_data {
unsigned int clkreg;
@@ -61,6 +62,7 @@ struct variant_data {
bool broken_blockend;
bool broken_blockend_dma;
bool sdio;
+ bool st_clkdiv;
};
static struct variant_data variant_arm = {
@@ -86,7 +88,9 @@ static struct variant_data variant_ux500 = {
.datalength_bits = 24,
.broken_blockend = true,
.sdio = true,
+ .st_clkdiv = true,
};
+
/*
* This must be called with host->lock held
*/
@@ -99,7 +103,22 @@ static void mmci_set_clkreg(struct mmci_host
*host, unsigned int desired)
if (desired >= host->mclk) {
clk = MCI_CLK_BYPASS;
host->cclk = host->mclk;
+ } else if (variant->st_clkdiv) {
+ /*
+ * DB8500 TRM says f = mclk / (clkdiv + 2)
+ * => clkdiv = (mclk / f) - 2
+ * Round the divider up so we don't exceed the max
+ * frequency
+ */
+ clk = DIV_ROUND_UP(host->mclk, desired) - 2;
+ if (clk >= 256)
+ clk = 255;
+ host->cclk = host->mclk / (clk + 2);
} else {
+ /*
+ * PL180 TRM says f = mclk / (2 * (clkdiv + 1))
+ * => clkdiv = mclk / (2 * f) - 1
+ */
clk = host->mclk / (2 * desired) - 1;
if (clk >= 256)
clk = 255;
--
1.7.3.2
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