On Tue, Sep 14, 2010 at 02:18:53PM +0100, Chris Ball wrote: > Hi, > > On Fri, Aug 20, 2010 at 02:22:56AM -0400, zhangfei gao wrote: > > From: Zhangfei Gao <zgao6@xxxxxxxxxxx> > > Date: Fri, 20 Aug 2010 14:02:36 -0400 > > Subject: [PATCH] sdhci: base clock freqency change in spec 3.0 > > Thanks, applied to mmc-next. > > We should have all of the changes required for SDHC 3.0 (8-bit wide data, > 10-bit divided clock mode, base clock frequency change) present in the > mmc-next tree now. Would someone with access to 3.0 hardware be able to > test that it's all working? Is the 8-bit support really according to the standard? I wonder because the bit currently used by sdhci.c is marked as "reserved/new assignment now allowed" in the simplified v2.0 spec. Regards, Wolfram -- Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ |
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