> > 2) 8-Bit data transfer support > > > > The comitted version ae6d6c92212e94b12ab9365c23fb73acc2c3c2e7 (sdhci: > > 8-bit data transfer width support) looks different from another RFC > > posted in February: > > http://www.mail-archive.com/linux-mmc@xxxxxxxxxxxxxxx/msg01250.html > > > > As those two already differ, I think it might be wiser to move > > 8-bit-mode-handling to the platform-specific code? Even the documented > > features of a SDHC differ across implementations, I fear side-effects > > when using this kind of undocumented feature (official spec says > > "reserved" when describing this bit). > > Okay it looks different from Samsung Spec. > WIDE8[5]: Extended Data Transfer Width (It is for MMC 8-bit card). > 1: 8-bit operatoin > 0: Bit width is designated by the bit 1(Data Transfer Width) > So no need to set the BIT 1 and BIT5 simultaneously. > I also wonder other Specs how described it. esdhc occupied BIT 2 (originally HI_SPD) for this :( %10 means 8 bit transfer. %11 is reserved. > Good, I think it's possible. I'll try and send a patch. Thanks! -- Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ |
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