Chris Ball wrote: > Hi David, > > > I couldn't find anything in the SDIO specification (you know the > > section number?). Part A2 has a requirement that the controller > > be placed into 1-bit mode but this doesn't mean that the card has > > to be. > > I think it's part E1 section 8, and does specify that it's necessary > for both host and card. Found it now, thanks. The patch is fine as is. (FWIW, my confusion arose because CSR chips can assert interrupts in 4-bit mode even without SDCLK.) David -- David Vrabel, Senior Software Engineer, Drivers CSR, Churchill House, Cambridge Business Park, Tel: +44 (0)1223 692562 Cowley Road, Cambridge, CB4 0WZ http://www.csr.com/ Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
