I'm working on a system where we have a need to share the eMMC host controller with both the main CPU and a micro-controller. So to coodinate access we need to define a mutex mechanism between the two. This is possible since there is some shared non-cachable static ram that both have access to. My question for this email list is, if we limit the mmc driver changes to use the chipset specific quirk mechanism, would that be acceptable ?? As soon as we have the code, we'll post it, but I am interested in any comments. Thanks. Charles Johnson Intel Corp. charles.f.johnson@xxxxxxxxx -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
