Am Mittwoch, den 30.09.2009, 22:49 +0100 schrieb Ian Molton:
> Hi,
>
> Sorry about that I forgot the base gets shifted there. I dont like
> tihs implementation too much though as I want to keep knowledge of the
> bus shift out of as muich code as possible. (currently none of the
> other tmio MFD cores know about it).
>
> Could you give this a whirl on top of my current patchset and see if
> it fixes things for you?
>
> I think the odds of a machine existing that needs two different bus
> shifts for two different tmio MFDs is vanishingly small and this code
> still allows us to build a kernel that supports machines with
> differing bus shifts to each other...
Hi Ian,
I've tested your patches up to 0004 on hx4700 with the following
additional modifications to the 0001 CNF abstraction patch:
From: Philipp Zabel <philipp.zabel@xxxxxxxxx>
Date: Sun, 4 Oct 2009 14:03:54 +0200
Subject: [PATCH 1/2] MMC,mfd: fix tmio_core code for ASIC3
- remove shift from base address (this is internal to the TMIO, and thus
not influenced by the address line shift between CPU and ASIC)
- add tmio_core_set_bus_shift declaration to tmio.h
- fix sd_config_write32
Signed-off-by: Philipp Zabel <philipp.zabel@xxxxxxxxx>
---
drivers/mfd/tmio_core.c | 5 ++---
include/linux/mfd/tmio.h | 6 +++++-
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mfd/tmio_core.c b/drivers/mfd/tmio_core.c
index 9b0f660..1a2208e 100644
--- a/drivers/mfd/tmio_core.c
+++ b/drivers/mfd/tmio_core.c
@@ -16,7 +16,7 @@ int tmio_core_mmc_enable(void __iomem *cnf, unsigned long base)
{
/* Enable the MMC/SD Control registers */
sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
- sd_config_write32(cnf, shift, CNF_CTL_BASE, ((base << shift) & 0xfffe));
+ sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
/* Disable SD power during suspend */
sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01);
@@ -33,10 +33,9 @@ EXPORT_SYMBOL(tmio_core_mmc_enable);
int tmio_core_mmc_resume(void __iomem *cnf, unsigned long base)
{
-
/* Enable the MMC/SD Control registers */
sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
- sd_config_write32(cnf, shift, CNF_CTL_BASE, (base << shift) & 0xfffe);
+ sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
return 0;
}
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 796b3b3..0992e71 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -45,12 +45,16 @@
#define sd_config_write16(base, shift, reg, val) \
tmio_iowrite16((val), (base) + ((reg) << (shift)))
#define sd_config_write32(base, shift, reg, val) \
- tmio_iowrite32((val), (base) + ((reg) << (shift)))
+ do { \
+ tmio_iowrite16((val), (base) + ((reg) << (shift))); \
+ tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
+ } while (0)
int tmio_core_mmc_enable(void __iomem *cnf, unsigned long base);
int tmio_core_mmc_resume(void __iomem *cnf, unsigned long base);
void tmio_core_mmc_pwr(void __iomem *cnf, int state);
void tmio_core_mmc_clk_div(void __iomem *cnf, int state);
+void tmio_core_set_bus_shift(int bus_shift);
/*
* data for the MMC controller
--
1.6.4.3
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