Signed-off-by: Andy Lutomirski <luto@xxxxxxxxxx>
---
arch/x86/include/asm/tlbflush.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 3d905f12cda9..32e3d8769a22 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -135,7 +135,17 @@ static inline void cr4_set_bits_and_update_boot(unsigned long mask)
static inline void __native_flush_tlb(void)
{
+ unsigned long flags;
+
+ /*
+ * We mustn't be preempted or handle an IPI while reading and
+ * writing CR3. Preemption could switch mms and switch back, and
+ * an IPI could call leave_mm. Either of those could cause our
+ * PCID to change asynchronously.
+ */
+ raw_local_irq_save(flags);
native_write_cr3(native_read_cr3());
+ raw_local_irq_restore(flags);
}
static inline void __native_flush_tlb_global_irq_disabled(void)
--
2.5.0
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