On Thu, Jun 11, 2015 at 2:19 PM, Dan Williams <dan.j.williams@xxxxxxxxx> wrote: > From: Ross Zwisler <ross.zwisler@xxxxxxxxxxxxxxx> > > Based on an original patch by Ross Zwisler [1]. > > Writes to persistent memory have the potential to be posted to cpu > cache, cpu write buffers, and platform write buffers (memory controller) > before being committed to persistent media. Provide apis, > memcpy_to_pmem(), sync_pmem(), and memremap_pmem(), to write data to > pmem and assert that it is durable in PMEM (a persistent linear address > range). A '__pmem' attribute is added so sparse can track proper usage > of pointers to pmem. > > [1]: https://lists.01.org/pipermail/linux-nvdimm/2015-May/000932.html > > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx> > Cc: Ingo Molnar <mingo@xxxxxxxxxx> > Cc: "H. Peter Anvin" <hpa@xxxxxxxxx> > Signed-off-by: Ross Zwisler <ross.zwisler@xxxxxxxxxxxxxxx> > [djbw: various reworks] > Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx> > --- > arch/x86/Kconfig | 1 > arch/x86/include/asm/cacheflush.h | 36 +++++++++++++ > arch/x86/include/asm/io.h | 6 ++ > drivers/block/pmem.c | 75 +++++++++++++++++++++++++-- > include/linux/compiler.h | 2 + > include/linux/pmem.h | 102 +++++++++++++++++++++++++++++++++++++ > lib/Kconfig | 3 + > 7 files changed, 218 insertions(+), 7 deletions(-) > create mode 100644 include/linux/pmem.h > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index f16caf7eac27..5dfb8f31ac48 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -28,6 +28,7 @@ config X86 > select ARCH_HAS_FAST_MULTIPLIER > select ARCH_HAS_GCOV_PROFILE_ALL > select ARCH_HAS_MEMREMAP > + select ARCH_HAS_PMEM_API > select ARCH_HAS_SG_CHAIN > select ARCH_HAVE_NMI_SAFE_CMPXCHG > select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI > diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h > index b6f7457d12e4..4d896487382c 100644 > --- a/arch/x86/include/asm/cacheflush.h > +++ b/arch/x86/include/asm/cacheflush.h > @@ -4,6 +4,7 @@ > /* Caches aren't brain-dead on the intel. */ > #include <asm-generic/cacheflush.h> > #include <asm/special_insns.h> > +#include <asm/uaccess.h> > > /* > * The set_memory_* API can be used to change various attributes of a virtual > @@ -108,4 +109,39 @@ static inline int rodata_test(void) > } > #endif > > +#ifdef ARCH_HAS_NOCACHE_UACCESS > +static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src, size_t n) > +{ > + /* > + * We are copying between two kernel buffers, if > + * __copy_from_user_inatomic_nocache() returns an error (page > + * fault) we would have already taken an unhandled fault before > + * the BUG_ON. The BUG_ON is simply here to satisfy > + * __must_check and allow reuse of the common non-temporal store > + * implementation for memcpy_to_pmem(). > + */ > + BUG_ON(__copy_from_user_inatomic_nocache((void __force *) dst, > + (void __user *) src, n)); Ick. If we take a fault, we will lose the debugging information we would otherwise have gotten unless we get lucky and get a usable CR2 value in the oops. > +} > + > +static inline void arch_sync_pmem(void) > +{ > + wmb(); > + pcommit_sfence(); > +} This function is non-intuitive to me. It's really "arch-specific sync pmem after one or more copies using arch_memcpy_to_pmem". If normal stores or memcpy to non-WC memory is used instead, then it's insufficient if the memory is WB and it's unnecessarily slow if the memory is WT or UC (the first sfence isn't needed). I would change the name and add documentation. I'd also add a comment about the wmb() being an SFENCE to flush pending non-temporal writes. --Andy -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>