On Thu, 2015-05-14 at 14:52 -0700, Dan Williams wrote: > On Wed, May 13, 2015 at 2:05 PM, Toshi Kani <toshi.kani@xxxxxx> wrote: > > The pmem driver maps NVDIMM with ioremap_nocache() as we cannot > > write back the contents of the CPU caches in case of a crash. > > > > This patch changes to use ioremap_wt(), which provides uncached > > writes but cached reads, for improving read performance. > > I'm thinking that for the libnd integration we don't want the pmem > driver hard coding the cache-policy decision. This is something that > should be specified to nd_pmem_region_create(). Especially > considering that platform firmware tables (NFIT) may specify the cache > policy for the range. As Matthew Wilcox mentioned offline we also > must match the DAX-to-mmap cache policy with the policy for the driver > mapping for architectures that are not capable of multiple mappings > of the same physical address with different policies. Agreed. I believe this hardcoded ioremap is temporary (either UC- or WT), and we need to allow NFIT or user to specify a map type, such as WB. Thanks, -Toshi -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>