On Wed, May 06, 2015 at 02:00:02PM +0200, Martin Schwidefsky wrote: > On Wed, 6 May 2015 14:29:39 +0300 > "Kirill A. Shutemov" <kirill@xxxxxxxxxxxxx> wrote: > > > I'm looking though s390 code around page table handling and I found that > > in many places s390 does tlb flush before changing page table entry. > > Uhh, have fun with that.. it is complicated :-/ > > > Let's look for instance on pmdp_clear_flush() implementation on s390. > > It's implemented with pmdp_get_and_clear() which does pmdp_flush_direct() > > *before* pmd_clear(). That's invert order comparing to generic > > pmdp_flush_direct(). > > > > The question is what prevents tlb from being re-fill between flushing tlb > > and clearing page table entry? > > Look again at pmdp_flush_direct(), either __pmdp_idte_local or __pmdp_idte is > called. Both functions use the IDTE instruction but in two different flavors. > The mnemonic IDTE stands for invalidate-dat-table-entry, the instruction sets > the invalid bit in the PMD and flushes all TLB entries on all CPUs that are > affected by the now invalid PMD. The pmd_clear after the pmdp_flush_direct is > done to set all the other bits of the PMD to the "empty" state. The invalid > bit is already set prior to pmd_clear. Okay, it makes some sense. One more question: why does __tlb_flush_full()/__tlb_flush_asce() require disabling preemption and pmdp_flush_direct() doesn't? -- Kirill A. Shutemov -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@xxxxxxxxx";> email@xxxxxxxxx </a>