On Mon, Mar 17, 2014 at 4:45 PM, Matthew Wilcox <willy@xxxxxxxxxxxxxxx> wrote:
On Mon, Mar 17, 2014 at 01:43:21PM +0200, Kirill A. Shutemov wrote:
> On Sat, Mar 15, 2014 at 10:46:13PM -0400, Matthew Wilcox wrote:
> > I'm actually working on this now. The basic idea is to put an entry inOne of the areas ignored by the original XIP code was CPU caches. Maybe
> > the radix tree for each page. For zero pages, that's a pagecache page.
> > For pages that map to the media, it's an exceptional entry. Radix tree
> > exceptional entries take two bits, leaving us with 30 or 62 bits depending
> > on sizeof(void *). We can then take two more bits for Dirty and Lock,
> > leaving 28 or 60 bits that we can use to cache the PFN on the page,
> > meaning that we won't have to call the filesystem's get_block as often.
>
> Sound reasonable to me. Implementation of ->map_pages should be trivial
> with this.
>
> Few questions:
> - why would you need Dirty for DAX?
s390 has write-through caches or something, but on x86 we need to write back
the lines from the CPU cache to the memory on an msync(). We'll also need
to do this for a write(), although that's a SMOP.
Indeed CLFLUSH has to be used extensively in order to guarantee that the data is seen by the memory controller. This adds many instructions to the execution path, and more importantly is associated with a substantial latency penalty. This sub-optimal behavior derives from the current hardware implementation (e.g Intel E5-26xx v2), which does not ADR-protect WB caches. Hopefully, in the future, processor vendors will extend the ADR protection to the WB caches, which will free us from the need to CLFLUSH.
It's clearly not enough :-) My plan is to have a pair of functions
> - are you sure that 28 bits is enough for PFN everywhere?
> ARM with LPAE can have up to 40 physical address lines. Is there any
> 32-bit machine with more address lines?
pfn_to_rte() and rte_to_pfn() with default implementations that work well
on 64-bit and can be overridden by address-space deficient architectures.
If rte_to_pfn() returns RTE_PFN_UNKNOWN (which is probably -1), we'll
just go off and call get_block and ->direct_access. This will be a
well-tested codepath because it'll be the same as the codepath used the
first time we look up a block.
Architectures can use whatever fancy scheme they like to optimise
rte_to_pfn() ... I don't think suggesting that enabling DAX grows
the radix tree entries from 32 to 64 bit would be a popular idea, but
that'd be something for those architecture maintainers to figure out.
I certainly don't care much about an x86-32 kernel with DAX ... I can
see it maybe being interesting in a virtualisation environment, but
probably not.
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