On Fri, Dec 20, 2013 at 01:20:19PM +0100, Ingo Molnar wrote:
>
> * Mel Gorman <mgorman@xxxxxxx> wrote:
>
> > tlb_flushall_shift == -1 Always use flush all
> > tlb_flushall_shift == 1 Aggressively use individual flushes
> > tlb_flushall_shift == 6 Conservatively use individual flushes
> >
> > IvyBridge was too aggressive using individual flushes and my patch
> > makes it less aggressive.
> >
> > Intel's code for this currently looks like
> >
> > switch ((c->x86 << 8) + c->x86_model) {
> > case 0x60f: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
> > case 0x616: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */
> > case 0x617: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */
> > case 0x61d: /* six-core 45 nm xeon "Dunnington" */
> > tlb_flushall_shift = -1;
> > break;
> > case 0x61a: /* 45 nm nehalem, "Bloomfield" */
> > case 0x61e: /* 45 nm nehalem, "Lynnfield" */
> > case 0x625: /* 32 nm nehalem, "Clarkdale" */
> > case 0x62c: /* 32 nm nehalem, "Gulftown" */
> > case 0x62e: /* 45 nm nehalem-ex, "Beckton" */
> > case 0x62f: /* 32 nm Xeon E7 */
> > tlb_flushall_shift = 6;
> > break;
> > case 0x62a: /* SandyBridge */
> > case 0x62d: /* SandyBridge, "Romely-EP" */
> > tlb_flushall_shift = 5;
> > break;
> > case 0x63a: /* Ivybridge */
> > tlb_flushall_shift = 2;
> > break;
> > default:
> > tlb_flushall_shift = 6;
> > }
> >
> > That default shift of "6" is already conservative which is why I
> > don't think we need to change anything there. AMD is slightly more
> > aggressive in their choices but not enough to panic.
>
> Lets face it, the per model tunings are most likely crap: the only
> place where it significantly deviated from '6' was Ivybridge - and
> there it was causing a regression.
>
> With your patch we'll have 6 everywhere, except on SandyBridge where
> it's slightly more agressive at 5 - which is probably noise.
>
> So my argument is that we should use '6' _everywhere_ and do away with
> the pretense that we do per model tunings...
>
Understood. I prototyped a suitable patch and stuck it in a queue. I
also took the libery of adding a patch that also reset IvyBridge to 6
out of curiousity. I'll post a suitable series once I have results.
--
Mel Gorman
SUSE Labs
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