Re: [LSF/MM TOPIC] Hardware initiated paging of user process pages, hardware access to the CPU page tables of user processes

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On Tue, Apr 16, 2013 at 7:50 PM, Simon Jeons <simon.jeons@xxxxxxxxx> wrote:
On 04/17/2013 12:27 AM, Jerome Glisse wrote:

[snip]



As i said this is for pre-filling already present entry, ie pte that are present with a valid page (no special bit set). This is an optimization so that the GPU can pre-fill its tlb without having to take any mmap_sem. Hope is that in most common case this will be enough, but in some case you will have to go through the lengthy non fast gup.

I know this. What I concern is the pte you mentioned is for normal cpu, correct? How can you pre-fill pte and tlb of GPU?

You getting confuse, idea is to look at cpu pte and prefill gpu pte. I do not prefill cpu pte, if a cpu pte is valid then i use the page it point to prefill the GPU pte.

So i don't pre-fill CPU PTE and TLB GPU, i pre-fill GPU PTE from CPU PTE if CPU PTE is valid. Other GPU PTE are marked as invalid and will trigger a fault that will be handle using gup that will fill CPU PTE (if fault happen at a valid address) at which point GPU PTE is updated or error is reported if fault happened at an invalid address.

Cheers,
Jerome

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