On 01/07/2013 03:12 AM, Shaohua Li wrote:
We use access bit to age a page at page reclaim. When clearing pte access bit, we could skip tlb flush for the virtual address. The side effect is if the pte is in tlb and pte access bit is unset, when cpu access the page again, cpu will not set pte's access bit. So next time page reclaim can reclaim hot pages wrongly, but this doesn't corrupt anything. And according to intel manual, tlb has less than 1k entries, which coverers < 4M memory. In today's system, several giga byte memory is normal. After page reclaim clears pte access bit and before cpu access the page again, it's quite unlikely this page's pte is still in TLB. Skiping the tlb flush for this case sounds ok to me.
Agreed. In current systems, it can take a minute to write all of memory to disk, while context switch (natural TLB flush) times are in the dozens-of-millisecond timeframes.
And in some workloads, TLB flush overhead is very heavy. In my simple multithread app with a lot of swap to several pcie SSD, removing the tlb flush gives about 20% ~ 30% swapout speedup. Signed-off-by: Shaohua Li <shli@xxxxxxxxxxxx>
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