> Looks the problem is worse than above, not only bitfields are affected, the > adjacent fields might be involved too, see: > > http://lwn.net/Articles/478657/ Not mentioned in there is that even with x86/amd64 given a struct with the following adjacent fields: char a; char b; char c; then foo->b |= 0x80; might do a 32bit RMW cycle. This will (well might - but probably does) happen if compiled to a 'BTS' instruction. The x86 instruction set docs are actually unclear as to whether the 32bit cycle might even be misaligned! amd64 might do a 64bit cycle (not checked the docs). David -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@xxxxxxxxx. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href