On Mon, Mar 10, 2025 at 11:42 PM Deepak Gupta <debug@xxxxxxxxxxxx> wrote:
>
> From: Clément Léger <cleger@xxxxxxxxxxxx>
>
> Add necessary SBI definitions to use the FWFT extension.
>
> Signed-off-by: Clément Léger <cleger@xxxxxxxxxxxx>
> ---
> arch/riscv/include/asm/sbi.h | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 3d250824178b..23bfb254e3f4 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -35,6 +35,7 @@ enum sbi_ext_id {
> SBI_EXT_DBCN = 0x4442434E,
> SBI_EXT_STA = 0x535441,
> SBI_EXT_NACL = 0x4E41434C,
> + SBI_EXT_FWFT = 0x46574654,
>
> /* Experimentals extensions must lie within this range */
> SBI_EXT_EXPERIMENTAL_START = 0x08000000,
> @@ -401,6 +402,31 @@ enum sbi_ext_nacl_feature {
>
> #define SBI_NACL_SHMEM_SRET_X(__i) ((__riscv_xlen / 8) * (__i))
> #define SBI_NACL_SHMEM_SRET_X_LAST 31
> +/* SBI function IDs for FW feature extension */
> +#define SBI_EXT_FWFT_SET 0x0
> +#define SBI_EXT_FWFT_GET 0x1
> +
> +enum sbi_fwft_feature_t {
> + SBI_FWFT_MISALIGNED_EXC_DELEG = 0x0,
> + SBI_FWFT_LANDING_PAD = 0x1,
> + SBI_FWFT_SHADOW_STACK = 0x2,
> + SBI_FWFT_DOUBLE_TRAP = 0x3,
> + SBI_FWFT_PTE_AD_HW_UPDATING = 0x4,
> + SBI_FWFT_LOCAL_RESERVED_START = 0x5,
> + SBI_FWFT_LOCAL_RESERVED_END = 0x3fffffff,
> + SBI_FWFT_LOCAL_PLATFORM_START = 0x40000000,
> + SBI_FWFT_LOCAL_PLATFORM_END = 0x7fffffff,
> +
> + SBI_FWFT_GLOBAL_RESERVED_START = 0x80000000,
> + SBI_FWFT_GLOBAL_RESERVED_END = 0xbfffffff,
> + SBI_FWFT_GLOBAL_PLATFORM_START = 0xc0000000,
> + SBI_FWFT_GLOBAL_PLATFORM_END = 0xffffffff,
> +};
> +
> +#define SBI_FWFT_GLOBAL_FEATURE_BIT (1 << 31)
> +#define SBI_FWFT_PLATFORM_FEATURE_BIT (1 << 30)
> +
> +#define SBI_FWFT_SET_FLAG_LOCK (1 << 0)
>
> /* SBI spec version fields */
> #define SBI_SPEC_VERSION_DEFAULT 0x1
>
LGTM.
Reviewed-by: Zong Li <zong.li@xxxxxxxxxx>
> --
> 2.34.1
>
>
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