On Tue, Sep 10, 2024 at 5:16 PM Arnd Bergmann <arnd@xxxxxxxx> wrote:
>
> On Tue, Sep 10, 2024, at 07:27, kernel test robot wrote:
>
> > 6a9bfa83709a84e Julian Vetter 2024-09-09 55 while (count >=
> > NATIVE_STORE_SIZE) {
> > 6a9bfa83709a84e Julian Vetter 2024-09-09 56 if
> > (IS_ENABLED(CONFIG_64BIT))
> > 6a9bfa83709a84e Julian Vetter 2024-09-09 @57
> > __raw_writeq(get_unaligned((uintptr_t *)from), to);
> > 6a9bfa83709a84e Julian Vetter 2024-09-09 58 else
>
> Right, this one actually has to be a preprocessor conditional
> because __raw_writeq is not defined.
All 32-bit ISAs didn't support __raw_writeq.
e.g.: include/asm-generic/io.h
#ifdef CONFIG_64BIT
#ifndef __raw_writeq
#define __raw_writeq __raw_writeq
static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
{
*(volatile u64 __force *)addr = value;
}
#endif
#endif /* CONFIG_64BIT */
e.g.: arch/riscv/include/asm/mmio.h
#ifdef CONFIG_64BIT
#define __raw_writeq __raw_writeq
static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
{
asm volatile("sd %0, 0(%1)" : : "r" (val), "r" (addr));
}
#endif
>
> Arnd
--
Best Regards
Guo Ren
