On Tue, Aug 06, 2024 at 10:49:58AM -0700, Linus Torvalds wrote:
Hi Linus,
Though this turned out to be a parisc issue, I'll still answer in
case you are interested.
...
> Or maybe it's the s390 ffs().
>
> It looks like
>
> static inline int ffs(int word)
> {
> unsigned long mask = 2 * BITS_PER_LONG - 1;
> unsigned int val = (unsigned int)word;
>
> return (1 + (__flogr(-val & val) ^ (BITS_PER_LONG - 1))) & mask;
> }
>
> where s390 has this very odd "flogr" instruction ("find last one G
> register"?) for the non-constant case.
>
> That uses a "union register_pair" but only ever uses the "even"
> register without ever using the full 128-bit part or the odd register.
> So the other register in the register pair is uninitialized.
In case of "flogr" instruction the odd register contains output data only.
There is no need to initialize it.
> Does that cause random compiler issues based on register allocation?
Using the register_pair guarantees that an even+odd register pair
is "reserved". As result, the register allocation prevents "flogr"
instruction from corrupting otherwise random odd register.
> Just for fun, does something like this make any difference?
>
> --- a/arch/s390/include/asm/bitops.h
> +++ b/arch/s390/include/asm/bitops.h
> @@ -305,6 +305,7 @@ static inline unsigned char __flogr(unsigned long word)
> union register_pair rp;
>
> rp.even = word;
> + rp.odd = 0;
> asm volatile(
> " flogr %[rp],%[rp]\n"
> : [rp] "+d" (rp.pair) : : "cc");
...
> Linus
Thanks!
