On Thu, Aug 01, 2024 at 05:04:03PM +0100, Joey Gouly wrote: > On Thu, Jul 25, 2024 at 04:49:08PM +0100, Dave Martin wrote: > > On Fri, May 03, 2024 at 02:01:28PM +0100, Joey Gouly wrote: > > > Expose a HWCAP and ID_AA64MMFR3_EL1_S1POE to userspace, so they can be used to > > > check if the CPU supports the feature. > > > > > > Signed-off-by: Joey Gouly <joey.gouly@xxxxxxx> > > > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > > > Cc: Will Deacon <will@xxxxxxxxxx> > > > --- > > > > > > This takes the last bit of HWCAP2, is this fine? What can we do about more features in the future? > > > > > > > > > Documentation/arch/arm64/elf_hwcaps.rst | 2 ++ > > > arch/arm64/include/asm/hwcap.h | 1 + > > > arch/arm64/include/uapi/asm/hwcap.h | 1 + > > > arch/arm64/kernel/cpufeature.c | 14 ++++++++++++++ > > > arch/arm64/kernel/cpuinfo.c | 1 + > > > 5 files changed, 19 insertions(+) > > > > > > diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst > > > index 448c1664879b..694f67fa07d1 100644 > > > --- a/Documentation/arch/arm64/elf_hwcaps.rst > > > +++ b/Documentation/arch/arm64/elf_hwcaps.rst > > > @@ -365,6 +365,8 @@ HWCAP2_SME_SF8DP2 > > > HWCAP2_SME_SF8DP4 > > > Functionality implied by ID_AA64SMFR0_EL1.SF8DP4 == 0b1. > > > > > > +HWCAP2_POE > > > + Functionality implied by ID_AA64MMFR3_EL1.S1POE == 0b0001. > > > > Nit: unintentionally dropped blank line before the section heading? > > Now there's only one blank line, I think > c1932cac7902a8b0f7355515917dedc5412eb15d unintentionally added 2 blank lines, > before that it was always 1! Hmmm, true. Not a big deal, I guess. Cheers ---Dave
